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Difficulty: Very hardSeparation of Control Plane and Data Plane

Match each network device operation or architectural component to its corresponding plane of operation or processing path in a modern router or switch architecture.

  • Building the Routing Information Base (RIB) and calculating OSPF Shortest Path First (SPF) metrics via the central processorControl Plane
  • Performing hardware-accelerated Forwarding Information Base (FIB) lookups and MAC header rewriting on ASIC line cardsData Plane (Forwarding Plane)
  • Authenticating SSH administrative sessions and processing NETCONF/RESTCONF RPC requests to update YANG datastoresManagement Plane
  • Generating ICMP Time Exceeded control messages for transit IP packets whose Time-to-Live (TTL) field decrements to zeroException Path (Punt to Control Plane)

Answer

Building the RIB and calculating OSPF metrics maps to the Control Plane; performing FIB lookups and MAC header rewriting maps to the Data Plane; processing SSH and RESTCONF sessions maps to the Management Plane; and generating ICMP Time Exceeded messages for TTL-expired packets maps to the Exception Path (Punt to Control Plane).
The pairs accurately distinguish between topology computation (Control Plane), line-rate hardware forwarding (Data Plane), administrative system management (Management Plane), and hardware exception redirection (Punt Path).

Step-by-Step Solution

1
Analyze routing protocol logic and topology computation
Mapped to Control Plane
Protocol logic like OSPF calculations and RIB maintenance requires general CPU processing to maintain global network state.
2
Analyze line-rate packet forwarding and hardware frame modification
Mapped to Data Plane
High-speed transit switching relies on compiled FIB/Adjacency tables programmed into hardware TCAM and ASICs.
3
Analyze network administrator management and API transactions
Mapped to Management Plane
Administrative connectivity and configuration state management are isolated within the Management Plane.
4
Analyze hardware forwarding exceptions such as TTL expiration
Mapped to Exception Path (Punt to Control Plane)
When ASIC forwarding hardware encounters conditions requiring ICMP generation, it punts the packet to the CPU process queue.

Key Concept

Separation of Control, Data, and Management Planes with Exception Handling
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Topics

Separation of Control Plane and Data Plane

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