A technician installs a high-performance PCIe x4 RAID controller card into the bottom physical PCIe x16 slot of a newly assembled workstation motherboard. After installing the card, the technician observes that the secondary onboard M.2 NVMe drive is no longer recognized by the system firmware during POST, while the primary M.2 NVMe drive functions normally. Which of the following motherboard design characteristics is responsible for this behavior?
- Chipset PCIe lane multiplexing and bus sharing between the M.2 slot and the lower expansion slotCevap
- BSelection of an M.2 drive operating on the legacy SATA protocol instead of the PCIe NVMe interface standard
- CInsufficient power allocation from the primary 24-pin ATX power supply connector to the motherboard expansion bus
- DPopulation of memory modules in single-channel slots, forcing the system controller to disable secondary storage buses
Cevap
Chipset PCIe lane multiplexing and bus sharing between the M.2 slot and the lower expansion slot is responsible for disabling the M.2 drive.
Motherboard manufacturers often multiplex PCIe lanes from the chipset to provide multiple expansion slots and M.2 sockets on the same board. Because the chipset has a fixed total number of lanes, populating a shared physical expansion slot (such as the bottom PCIe x16 slot operating at x4 electrically) automatically disables or reroutes bandwidth away from specific onboard M.2 storage connectors.
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Anahtar Kavram
PCIe Lane Multiplexing and Motherboard Connector Bus Sharing