Passage:
In the early 2000s, semiconductor manufacturers faced physical limits when attempting to shrink silicon transistors using conventional deep ultraviolet (DUV) immersion lithography. To surpass these constraints, industry leaders invested in extreme ultraviolet (EUV) lithography, a process requiring high-power tin-plasma light sources and specialized mirrors operating in a vacuum. However, early EUV scanners suffered from extremely short collector mirror lifespans due to heavy debris bombardment from the tin-plasma generation. Consequently, many chipmakers opted to extend DUV lithography through complex multi-patterning techniques rather than adopt EUV prematurely. Multi-patterning increased the number of exposure steps per wafer—raising production costs and lowering manufacturing yields—yet it allowed fabrication plants to utilize existing, fully depreciated DUV equipment without committing massive capital to unproven EUV infrastructure. By 2018, breakthroughs in hydrogen-gas flushing systems significantly mitigated tin-debris deposition on EUV collector mirrors, stabilizing operational uptime and dramatically reducing mirror replacement costs. As a result, major foundries that had deferred EUV deployment were able to transition directly to commercial EUV production for sub-7-nanometer nodes without incurring the severe financial losses suffered by early EUV adopters who attempted integration prior to the hydrogen-flushing innovation.
Based on the passage, which of the following can be inferred about the semiconductor manufacturers that extended DUV lithography through multi-patterning prior to 2018?
- They accepted higher operational expenses per wafer to avoid upfront capital investment in EUV technology until collector mirror degradation issues were resolved.Cevap
- BThey suffered greater financial losses than early EUV adopters because the cumulative costs of multi-patterning exceeded the price of new EUV scanners.
- CThey directly developed the hydrogen-gas flushing technology to accelerate their own eventual transition to EUV lithography.
- DThey derived no economic benefit from multi-patterning DUV lithography prior to 2018 due to reduced chip yields and extra exposure steps.
- EThey were ultimately unable to produce sub-7-nanometer nodes because DUV lithography could not achieve sufficient transistor density.